In 1995, a project was launched to develop the StrongARM microprocessor family that implemented the ARM V4 instruction set. SPARC V9 provided for the use of a cache of the first level, divided into instructions and data (each with a capacity of 16 KB), as well as a second level with a capacity of 512 KB - 1024 KB.
#Amd k10 45nm technology 64 bits
The platform expanded to 64 bits and was superscalar with a 9-stage pipeline. Texas Instruments, Fujitsu, Philips and others collaborated on the next-generation SPARC V9 architecture with Sun Microsystems. In 1992, the next 32-bit version appeared, called SPARC V8, on the basis of which the microSPARC processor was created. Its frequency reached 14.28 MHz - 40 MHz. The first processor of the same name was released in the late 80s and was called SPARC V7. Processors Sun Microsystems, the company that developed the scalable SPARC architecture (Scalable Processor ARChitecture), joined the processor lineup. In the late 90s, MIPS started selling licenses for the 32-bit and 64-bit MIPS32 and MIPS64 architectures. The CPU worked at a frequency of 150 MHz - 250 MHz. The processor included 32 KB of the primary cache of data and instructions. In 1996, a revised version was released - R10000. 6 circuits were used: a device for integer instructions, for floating point instructions, three secondary RAM cache descriptors and an ASIC cache controller. This CPU had a high data access bandwidth (up to 1.2 Gb / s) in combination with a high speed of operations. The capacity of the data cache was 16 KB. In 1994, the first processor with a superscalar implementation of the MIPS architecture, the R8000, appeared. The processor could operate at a frequency of 100 MHz - 250 MHz. In this model, the cache has increased to 32 KB (16 KB of cache commands and 16 KB of cache data). The internal cache was 16 KB (8 KB of cache instructions and 8 KB of cache data).Ī year later, a modified version of the processor - R4400 - was released. This processor had a 64-bit architecture, an integrated coprocessor and worked at a clock frequency of 100 MHz. In 1991, the new generation R4000 line was released. The R3000 also became the basis of the Sony PlayStation game console. The processor has found application in SG-series workstations of different companies.
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The updated model had support for multiprocessing, instruction cache and data cache. In 1985, the company's first product was released - the 32-bit R2000, which in 1988 was finalized in the R3000. MIPS has licensed microprocessor architecture and IP cores for smart home devices, network and mobile applications. In 1984, a group of researchers led by American scientist John Hennessey founded a company designing microelectronic devices. MIPS processors: R2000, R3000, R4000 and R4400 TheĪrchitecture of MIPS processors (Microprocessor without Interlocked Pipeline Stages) provided for the presence of auxiliary units in the crystal.
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The next RISC II totaled 40,760 transistors, used 39 instructions and was faster. He had only 32 instructions and worked at a frequency of 4 MHz. RISC I was released in 1982 and contained more than 44,420 transistors. In addition, pipelining with simplified instructions was used, which made it possible to effectively increase the clock frequency. There were also many more general purpose registers. Each instruction of the RISC platform was simple and executed in one clock cycle. RISC (restricted instruction set computer) - processor architecture with increased speed due to simplified instructions.īerkeley RISC project managers David Patterson and Carlo SequinĪfter several years of fruitful work, several processor models with a reduced set of instructions appeared on the market. In 1980, the Berkeley RISC project was launched, led by American engineers David Patterson and Carlo Sequin. There was a need to modernize production and increase the number of transistors. The chips were quite complex and expensive, as well as not sufficiently productive. Many processors of the 80s used the CISC architecture (Complex instruction set computing).
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the history of the evolution of processors from the end of the 20th century to the beginning of the 21st century.